AMD has released the first specifications for a set of future chip enhancements designed to speed up parallel applications.
The new Light-Weight Profiling (LWP) applies to multi-core processors and aims to reduce the number of conflicts between processes. It will especially benefit relatively simple applications executed on multiple cores, such as Java applications.
"[LWP] is a new ability for software to retrieve performance data from the hardware and to act on it to optimise itself," Earl Stahl, a vice president of software engineering at AMD, said.
"It is a new mechanism that is available to add a bit of runtime intelligence into the software."
Because multi-core processors are able simultaneously to perform multiple tasks, these tasks can cause the digital equivalent of traffic jams.
Two operations simultaneously attempting to access a processor's cache memory, for instance, can cause a jam.
The upcoming AMD technology will report data on the jam back to the application, allowing it to divert one of the processes to another resource.
The chipmaker was unable to provide an estimate for the average performance benefit, arguing that the performance boost depends on the nature of the application.
LWP is essentially a new chip extension such as the x64 technology that allows an x86 processor to interpret 32-bit and 64-bit instructions.
Intel unveiled its ISS4 instruction set last year, which introduces a collection of 50 new chip instructions that accelerate common tasks. Intel does not have any instructions for accelerating parallelism.
The AMD specification targets developers of Java runtime engines and software development tools.
Application developers will not be exposed to the technology but should be able to gain the benefits by using qualifying developer tools and runtime engines.
It is likely to be several years before the specification is incorporated into actual hardware, Stahl said. Today's publication of the LWP is merely starting the discussion about the specification.
LWP will be available royalty free, and Stahl said that it will allow rival chip vendors such as Intel to support the technology.
AMD floats parallelism accelerator
By
Tom Sanders
on Aug 15, 2007 12:10PM

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